<<<--- % Author M.Ruckert LOC #100 w IS $0 return value u IS $0 1. parameter v IS $1 2. parameter s IS $2 $w$ unpacked e IS $3 f IS $4 f0 IS $5 The low 64 bit of $f$ carry IS $13 The shuttle between $f$ and $f_0$. eu IS $7 $u$ unpacked fu IS $8 ev IS $10 $v$ unpacked fv IS $11 d IS $12 $e_u - e_v$ tmp IS $14 --->>> Fmul SLU eu,u,1; SLU ev,v,1 Remove sign bit SRU eu,eu,53; SRU ev,ev,53 \ul{\sl M1.~Unpack.} SETH tmp,#FFF0 Get sign and exponent mask. ANDN fu,u,tmp; ANDN fv,v,tmp Remove sign and exponet bits. INCH fu,#0010; INCH fv,#0010 Add hidden bit. XOR s,u,v; SRU s,s,63 $s_w \is s_u\cdot s_v$ SLU fv,fv,6; SLU fu,fu,6 \ul{\sl M2.~Operate.} MULU f0,fu,fv; GET f,rH $(f,f_0) \is 2^{52+6}f_u2^{52+6}f_v=2^{52+64}f_uf_v$ ADD e,eu,ev; SET tmp,1023; SUB e,e,tmp $e\is e_u+e_v-q$ JMP Normalize \ul{\sl M3.~Normalize.} Fdiv SLU eu,u,1; SLU ev,v,1 Remove sign bit SRU eu,eu,53; SRU ev,ev,53 \ul{\sl M1.~Unpack.} SETH tmp,#FFF0 Get sign and exponent mask. ANDN fu,u,tmp; ANDN fv,v,tmp Remove sign and exponent bits. INCH fu,#0010; INCH fv,#0010 Add hidden bit. XOR s,u,v; SRU s,s,63 $s_w \is s_u\cdot s_v$ SLU fv,fv,11 \ul{\sl M2.~Operate.} $f_v \is 2^{11}f_v$ PUT rD,fu; SET tmp,0; DIVU f,tmp,fv $(f,f_0)\is 2^{52+64}f_u/(2^{52+11}f_v)=2^{53}f_u/f_v$ GET tmp,rR; PUT rD,tmp SET tmp,0; DIVU f0,tmp,fv SUB e,eu,ev; INCL e,1023-1 $e\is e_u-e_v+q-1$ JMP Normalize \ul{\sl M3.~Normalize.} <<<--- Normalize SRU tmp,f,53; BP tmp,4F \ul{\sl N1.~Test $f$.} OR tmp,f,f0; BZ tmp,Error underflow 2H SRU tmp,f,52; BP tmp,5F \ul{\sl N2.~Is $f$ normalized?} ZSN carry,f0,1; SLU f0,f0,1 \ul{\sl N3.~Scale left.} SLU f,f,1; ADDU f,f,carry SUB e,e,1 JMP 2B 4H AND carry,f,1 \ul{\sl N4.~Scale right.} SLU carry,carry,63 SRU f0,f0,1; ADDU f0,f0,carry SRU f,f,1 ADD e,e,1 5H SETH tmp,#8000 \ul{\sl N5.~Round.} CMPU tmp,f0,tmp Compare $f_0$ to ${1\over 2}$ CSOD carry,f,1 $f$ is odd. Round up if $f_0 \ge {1\over 2}$ CSEV carry,f,tmp $f$ is even. Round up if $f_0 > {1\over 2}$ ZSNN carry,tmp,carry Round down if $f_0 < {1\over 2}$ ADDU f,f,carry SET f0,0 SRU tmp,f,53; BP tmp,4B Rounding overflow SET tmp,#7FE; CMP tmp,e,tmp \ul{\sl N6.~Check $e$.} BP tmp,Error Overflow BNP e,Error Underflow SLU w,s,63 \ul{\sl N5.~Pack.} SLU tmp,e,52; OR w,w,tmp ANDNH f,#FFF0 remove hidden bit OR w,w,f SET $0,w POP 1,0 Main FLOT $2,2 FLOT $3,5 PUSHJ $1,Fmul FLOT $2,30 PUSHJ $0,Fdiv SET $255,0 TRAP 0,Halt,0 Error SET $255,1 TRAP 0,Halt,0 --->>>